selected publications

• academic article

  • Adaptive Time-Triggered Multi-Core Architecture.  Designs.  3:7-7. 2019
  • SAFEPOWER project: Architecture for safe and power-efficient mixed-criticality systems.  Microprocessors and Microsystems.  52:89-105. 2017
  • SAFEPOWER project: Architecture for safe and power-efficient mixed-criticality systems.  Zenodo (CERN European Organization for Nuclear Research).  2017