selected publications

• academic article

  • Pipelined architecture for fast CMOS buffer RAMs.  IEEE Journal of Solid-state Circuits.  25:741-747. 1990

• conference paper

  • Systolic architectures and applications for nanomagnet logic 2012
  • Hierarchical architecture for fast CMOS SRAMs 2003
  • Pipelined 16k Buffer RAM with 300MHz Operating Frequency 1989