selected publications

• academic article

  • Memory Hierarchies, Pipelines, and Buses for Future Architectures in Time-Critical Embedded Systems.  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.  28:966-978. 2009
  • The worst-case execution-time problem—overview of methods and survey of tools.  ACM Transactions in Embedded Computing Systems.  7:1-53. 2008
  • The influence of processor architecture on the design and the results of WCET tools.  Proceedings of the IEEE.  91:1038-1054. 2003

• conference paper

  • Mapping Task-Graphs on Distributed ECU Networks: Efficient Algorithms for Feasibility and Optimality.  . 2006