selected publications

• academic article

  • Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting.  Journal of VLSI signal processing.  43:235-246. 2006
  • Retargetable compilers and architecture exploration for embedded processors.  IEE proceedings.  152:209-209. 2005

• chapter

  • Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting.  Lecture Notes in Computer Science. 463-473. 2004

• conference paper

  • C Compiler Retargeting Based on Instruction Semantics Models.  Design, Automation, and Test in Europe. 2005
  • A methodology and tool suite for C compiler generation from ADL processor models.  Proceedings Design, Automation and Test in Europe Conference and Exhibition. 2004
  • A methodology and tool suite for C compiler generation from ADL processor models.  . 21276-21276. 2004
  • A system level processor/communication co-exploration methodology for multi-processor system-on-chip platforms.  . 21256. 2004
  • RTL processor synthesis for architecture exploration and implementation.  . 30156. 2004
  • Instruction encoding synthesis for architecture exploration using hierarchical processor models.  . 2003
  • Architecture Implementation Using the Machine Description Language LISA.  Asia and South Pacific Design Automation Conference. 239-244. 2002