selected publications chapter Hinoc: A Hierarchical Generic Approach for on-Chip Communication, Testing and Debugging of SoCs. Kluwer Academic Publishers eBooks. 39-54. 2006 conference paper A simulation framework for 3-dimension Networks-on-chip with different vertical channel density configurations. . 2012 Buffer-Architecture Exploration for Routers in a Hierarchical Network-on-Chip. . 2005