selected publications
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academic article
- SAFEPOWER project: Architecture for safe and power-efficient mixed-criticality systems. Microprocessors and Microsystems. 52:89-105. 2017
- SAFEPOWER project: Architecture for safe and power-efficient mixed-criticality systems. Zenodo (CERN European Organization for Nuclear Research). 2017
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chapter
- Exploiting Segregation in Bus-Based MPSoCs to Improve Scalability of Model-Checking-Based Performance Analysis for SDFAs. IFIP advances in information and communication technology. 2013
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conference paper
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proceedings
- A Hypervisor Architecture for Low-Power Real-Time Embedded Systems. Zenodo (CERN European Organization for Nuclear Research). 2018