selected publications

• academic article

  • Special issue on in-memory computing: Circuits, system, architecture and verification.  .  5:100062-100062. 2023
  • Toward RISC-V CSR Compliance Testing.  IEEE Embedded Systems Letters.  13:202-205. 2021
  • A PLiM Computer for the Internet of Things.  IEEE Computer.  50:35-40. 2017

• chapter

  • Embedded Compression Architecture for Test Access Ports.  . 2021
  • Compilation and Wear Leveling for Programmable Logic-in-Memory Architecture.  . 2019
  • ProACt: Hardware Architecture for Cross-Layer Approximate Computing.  . 2018
  • Introduction.  Springer eBooks. 3-10. 1998

• conference paper

  • Advanced Environment Modeling and Interaction in an Open Source RISC-V Virtual Prototype.  Proceedings of the Great Lakes Symposium on VLSI 2022. 2022
  • Virtual Prototype driven Design, Implementation and Evaluation of RISC-V Instruction Set Extensions.  . 2022
  • Automated Detection of Spatial Memory Safety Violations for Constrained Devices.  2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC). 2022
  • Early Validation of SoCs Security Architecture Against Timing Flows Using SystemC-based VPs.  2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD). 2021
  • XbNN: Enabling CNNs on Edge Devices by Approximate On-Chip Dot Product Encoding.  . 2021
  • A Hybrid Embedded Multichannel Test Compression Architecture for Low-Pin Count Test Environments in Safety-Critical Systems.  . 2019
  • Systematic RISC-V based Firmware Design^⋆.  . 2019
  • Hybrid Architecture for Embedded Test Compression to Process Rejected Test Patterns.  . 2019
  • VecTHOR: Low-cost compression architecture for IEEE 1149-compliant TAP controllers.  . 2016