selected publications

• academic article

  • Automated Driving: The Cyber-Physical Perspective.  IEEE Computer.  51:76-79. 2018
  • Real-time analysis of priority-preemptive NoCs with arbitrary buffer sizes and router delays.  Real-time Systems.  55:63-105. 2018
  • Ethernet Architecture — finding a clear strategy.  Auto Tech Review.  2015
  • Proceedings of the 2014 International Conference on Compilers, Architecture and Synthesis for Embedded Systems.  .  2014
  • Cooperating on Real-Time Capable Ethernet Architecture in Vehicles.  ATZelektronik worldwide.  2013
  • MORPHEUS.  ACM Transactions in Embedded Computing Systems.  12:1-33. 2013
  • Application development with the FlexWAFE real-time stream processing architecture for FPGAs.  ACM Transactions in Embedded Computing Systems.  9:1-23. 2009
  • System Level Performance Analysis for Real-Time Automotive Multicore and Network Architectures.  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.  28:979-992. 2009
  • An event-driven multi-threading architecture for embedded systems.  .  29-33. 1997

• chapter

  • The EPOC Architecture—Enabling Evolution Under Hard Constraints.  . 399-412. 2011
  • A PROCESSOR-COPROCESSOR ARCHITECTURE FOR HIGH END VIDEO APPLICATIONS.  Elsevier eBooks. 688-691. 2002

• conference paper

  • Architecting high-speed command schedulers for open-row real-time SDRAM controllers.  . 2017
  • Admission control and self-configuration in the EPOC framework.  . 2011
  • Learning early-stage platform dimensioning from late-stage timing verification.  Design, Automation, and Test in Europe. 851-857. 2009
  • A bandwidth optimized SDRAM controller for the MORPHEUS reconfigurable architecture.  Proceedings. 2008
  • A Virtual Platform for Architecture Integration and Optimization in Automotive Communication Networks.  SAE technical paper series. 2007
  • Process versions in rapid prototyping.  . 2003
  • A processor-coprocessor architecture for high end video applications.  . 2002
  • Embedded program timing analysis based on path clustering and architecture classification.  International Conference on Computer Aided Design. 598-604. 1997
  • Architecture of a Monolithic Digital Signal Processor with a Novel Control Flow Concept.  . 1986