selected publications

• academic article

  • Automatic Generation of Memory Interfaces for ASIPs.  International Journal of Embedded and Real-time Communication Systems.  1:1-23. 2010

• blog posting

  • Achieving Efficient Realization of Kalman Filter on CGRA through Algorithm-Architecture Co-design.  arXiv (Cornell University). 2018

• chapter

  • Achieving Efficient Realization of Kalman Filter on CGRA Through Algorithm-Architecture Co-design.  Lecture Notes in Computer Science. 2018
  • Automatic Generation of Memory Interfaces for ASIPs.  IGI Global eBooks. 79-100. 2012

• conference paper

  • A Systematic Approach for Acceleration of Matrix-Vector Operations in CGRA through Algorithm-Architecture Co-Design.  . 2019
  • Architectural reliability estimation using design diversity.  . 2015
  • Scalable and energy-efficient reconfigurable accelerator for column-wise givens rotation.  . 2014
  • Exploiting architecture description language for diverse IP synthesis in heterogeneous MPSoC.  . 2013
  • Design and analysis of layered coarse-grained reconfigurable architecture.  . 2012
  • Adaptive Energy-Efficient Architecture for WCDMA Channel Estimation.  . 2011
  • Automatic generation of memory interfaces.  . 2009
  • High-level modelling and exploration of coarse-grained re-configurable architectures.  . 2008
  • High-level Modelling and Exploration of Coarse-grained Re-configurable Architectures.  2008 Design, Automation and Test in Europe. 2008
  • Pre- and Post-Fabrication Architecture Exploration for Partially Reconfigurable VLIW Processors.  Proceedings. 2007
  • Design space exploration of partially re-configurable embedded processors.  Design, Automation, and Test in Europe. 319-324. 2007
  • Instruction Set Customization of Application Speci.c Processors for Network Processing: A Case Study.  . 2006
  • Optimization Techniques for ADL-Driven RTL Processor Synthesis.  . 2006
  • RTL processor synthesis for architecture exploration and implementation.  . 30156. 2004