publication venue for

• Instruction translation for an experimental S/390 processor.  29:37-42. 2001
• A combined compiler and architecture technique to control multithreaded execution of branches and loop iterations.  28:53-61. 2000
• On the use of SPEC benchmarks in computer architecture research.  25:19-22. 1997
• A multi-level parallelism architecture.  19:86-93. 1991
• A unified vector/scalar floating-point architecture.  17:134-143. 1989
• Evolutionary computer architecture.  5:10-16. 1976
• Evaluation criteria for abstract machines with unknown applications.  4:2-9. 1975
• Increasing hardware complexity—a challenge to computer architecture education.  2:201-206. 1973