selected publications

• academic article

  • Self-Awareness as a Model for Designing and Operating Heterogeneous Multicores.  ACM Transactions on Reconfigurable Technology and Systems.  7:1-18. 2014
  • IMORC: An infrastructure and architecture template for implementing high-performance reconfigurable FPGA accelerators.  Microprocessors and Microsystems.  2012
  • FPGA Acceleration of Communication-Bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study.  International Journal of Reconfigurable Computing.  2011:1-11. 2011
  • A Hardware Accelerator for k-th Nearest Neighbor Thinning.  .  245-251. 2008

• blog posting

  • High Level Synthesis Implementation of a Three-dimensional Systolic Array Architecture for Matrix Multiplications on Intel Stratix 10 FPGAs 2021

• chapter

  • Self-aware Compute Nodes.  Natural computing series. 2016

• conference paper

  • Performance estimation framework for automated exploration of CPU-accelerator architectures.  . 2011
  • Optimal temporal partitioning based on slowdown and retiming.  . 2006